Computing performance has remarkably developed over the decades in line with the development of transistor integration technology. However, according to the International Technology Roadmap for Semiconductors (ITRS), it is predicted that the above silicon integration-based development is now approaching its physical limitations. As a substitute technology, various techniques such as spintronics, single electron transistor (SET), molecular electronic RTD, and NANO CMOS have been actively studied recently. Meanwhile, image processing devices on cellular telephones and other such devices require parallel operations, faster interaction between logical functions and memories, resettable logical functions, and the above requirements are expected to be imposed upon a general personal computer.
A CPU of a computer is a digital engine constructed on a single semiconductor chip based on transistor technology. Digital circuits, which include Complementary Metal Oxide Semiconductors (CMOS) have 2 logical circuits. One of the circuits is a combination logic circuit and the other is a sequential logic circuit. The combination logic circuit includes a combination of logic circuits, such as NAND, NOR and XOR gates, and output result of the operation immediately. The sequential logic circuits include a storage, such as a latch or a resistor for storing the interim operation results, so that the circuit can perform a series of operations sequentially and output the final result of the operations. The sequential logic circuits store outputs of the combination logic circuits to allow the output of the next stage to be determined based on the current output as well as the current input, thus implementing a complex logic circuit, which cannot be implemented only with combination logic circuits.
A magneto-logic device, which is to be substituted for the conventional CMOS logic device is being widely studied (A. Ney, “Reconfigurable magnetologic computing using MRAM cells,” Proceeding of International Conference on Electromagnetics in Advanced Applications, ICEAA (2007)). The magneto-logic device adopts a Magneto-resistive Random Access Memory, which has been recently used as an information storage element for implementing a logic circuit
A magneto-logic device is a device manufactured such that the direction of magnetization of a ferromagnetic material the device is made of, which is less than a submicron, corresponds to a Boolean logic “1” or “0.” The input corresponds to the direction of magnetization of a ferromagnetic material the device is made of, and the output may correspond to a current, voltage or direction of magnetization of the output stage.
In the magneto-logic device, data operations and storage are performed at the same place, compared to the conventional logic device where data operations and storage are performed at different places. Such characteristics of the magneto-logic device may be attributed to its non-volatility and reconfigurability of stored data.
An effective magneto-logic device makes it possible to perform parallel operations, increases the operational speed and decreases the energy dissipation rate through faster interaction between the logical operating part and a memory, and quickly reconfiguring logic. Therefore, the chip applying the above can perform various functions in a single chip.
The magneto-logic device is a cutting edge device whose concept appeared in the early 2000s, and its experimental studies started recently. Various international research teams are organized to conduct the research for implementing the magneto-logic device. Many magneto-logic devices based on various principles have been introduced, some of which are briefly mentioned below.
The Paul Drude Institute team of Germany introduced an epoch-making magneto-logic device based on the magnetic tunneling junction (MTJ) phenomenon (A. Ney, C. Pampuch, R. Koch and K. H. Ploog, “Programmable computing with a single magnetoresistive element,” Nature, page 485 (2003); A. Ney, J. S. Harris, “Reconfigurable magnetologic computing using the spin flop switching of a magnetic random access memory cell,” Applied Physics Letters 86, 013502 (2005)). University of Bielefeld of Germany, which is the main team member of the European Consortium for researching the magneto-logic device, introduced a method of implementing most of the logic gates with 2 MTJs, which is one of the early achievements of this research (V. Hoink, D. Meyners, J. Schmalhorst, G Reiss, D. Junk, D. Engel and A. Ehresmann, “Reconfigurable magnetic logic for all basic logic functions produced by ion bombardment induced magnetic patterning” Applied Physics Letters 91, 162505 (2007)).
LIRMM University of Montpellier of France developed a device based on the conventional FPGA (field programmable gate array) technology as well as spin technology by combining an FPGA with a MTJ. The above research was evaluated as the most practical method for combining the MTJ technology with the current semiconductor technology (N. Bruchon, G. Cambon, L. Torres, and G. Sassatelli, “Magnetic Remanent Memory Structures for Dynamically Reconfigurable FPGA,” Proceedings of 2005 International Conference on Field Programmable Logic and Applications, page 687 (2005)). Although the idea of making the magneto-logic device reprogrammable is excellent and the current research on the magneto-logic device with MTJ is actively in progress, it cannot be ensured that the above research will turn out to be effective because the magnetic resistance is too small to construct an array structure such as a CMOS for a logic gate. Also, flexibility will be lost if multilayer input structure MTJ devices are interconnected for implementing the magneto-logic device, and the wiring will be complicated if the independent input lines are connected. Moreover, since a non-uniform operating current is needed, 3 layers of the metal input lines insulated from each other must be stacked on the stacked MTJ device and this process is generally difficult.
Moreover, University of California, San Diego of the US introduced a method for converting the spin accumulation infused in the semiconductor into electrical signals and applying them to the logic circuit. This technology was evaluated to be good in terms of its originality and adoptability in converting the spin accumulation into electrical signals (H. Dery, P. Dalal, L. Cywinski and L. J. Sham, “Spin-based logic in semiconductors for reconfigurable large-scale circuits,” Nature, page 573 (2007)). However, this technology is associated with a problem that its embodiment is conditioned upon the spin infusion, which is known as being hard to achieve in the spintronics.
Also, University of Illinois at Urbana-Champaign of the US introduced a device using a hole effect based on the micro magnet formed on the semiconductor, that is, a device using a hole device on a conventional CMOS, and implemented it into a logic gate (L. Kothari, and N. P. Carter, “Architecture of a Self-Checkpointing Microprocessor that Incorporates Nanomagnetic Devices,” IEEE Transaction on computers 56, 161 (2007)). The above technology is considerable in terms of forming a local magnetic field of a micro magnet. However, the device in accordance with this technology is not a 100% magneto-logic device because a conventional CMOS device is used in the reconfiguration function.
Various other technologies have been introduced for implementing a magneto logic device such as domain wall motions technology (D. A. Allwood, G. Xiong, C. C. Faulkner, D. Atkinson, D. Petit, R. P. Cowburn, “Magnetic Domain-Wall Logic,” Science 309, page 1688 (2005)); carbon nano tube (I. Zutic and M. Fuhrer, “Spintronics—A path to spin logic,” Nature Physics, page 85 (2005); S. Sahoo, et al., “Electric field control of spin transport,” Nature Physics, page 99 (2005)), single electron transistor technology (P. N. Hai, S. Sugahara and M. Tanaka, “Reconfigurable Logic Gates Using Single-Electron Spin Transistors,” Japanese Journal of Applied Physics 46, page 6579 (2007)). However, these technologies are no more than academic research and have lots of problems. For example, they require massive power and they are difficult to produce on a large scale, and they are practicable only under cryogenic conditions.
The above technologies have common problems to be solved as follows. First, since the assembly of various unit logic devices in an array forms a logic circuit, the on/off distinction capability of the unit logic device must be good. However, the on/off discrimination ratio of the unit logic device based on the above technologies such as MTJ, spin accumulation, and domain wall motion technology is not large enough making it impossible to form an array type logic device with the above technologies. Moreover, since magneto logic devices using the above technologies is operable only under cryogenic conditions, it is necessary to raise the operable temperature of the logic devices to room temperature.